diff --git a/stitch_project/stitch/LockinChainTestbench_isim_beh.wdb b/stitch_project/stitch/LockinChainTestbench_isim_beh.wdb
index 0d6afb9d0a7aea50a7faa33b09f567de2757738c..1fb808210cbc9de56f622ba8769a885957fedf5c 100644
Binary files a/stitch_project/stitch/LockinChainTestbench_isim_beh.wdb and b/stitch_project/stitch/LockinChainTestbench_isim_beh.wdb differ
diff --git a/stitch_project/stitch/Stitch_summary.html b/stitch_project/stitch/Stitch_summary.html
index 9f68df6adfb81f5bd4ab07bb8ff1d8e7d79f8ae8..2a1e59fc968e3d5d8216d8ed302157ae9785a05a 100644
--- a/stitch_project/stitch/Stitch_summary.html
+++ b/stitch_project/stitch/Stitch_summary.html
@@ -456,10 +456,10 @@ System Settings</A>
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/ise/iseprojects/stitch/stitch_project/stitch/isim.log'>ISIM Simulator Log</A></TD><TD>Current</TD><TD COLSPAN='2'>Mon Dec 2 23:55:28 2024</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/ise/iseprojects/stitch/stitch_project/stitch/isim.log'>ISIM Simulator Log</A></TD><TD>Current</TD><TD COLSPAN='2'>Tue Dec 3 00:52:55 2024</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/ise/iseprojects/stitch/stitch_project/stitch/webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Mon Dec 2 15:53:49 2024</TD></TR>
</TABLE>
-<br><center><b>Date Generated:</b> 12/02/2024 - 23:58:37</center>
+<br><center><b>Date Generated:</b> 12/03/2024 - 07:12:28</center>
</BODY></HTML>
\ No newline at end of file
diff --git a/stitch_project/stitch/_xmsgs/pn_parser.xmsgs b/stitch_project/stitch/_xmsgs/pn_parser.xmsgs
index 576e8c4a3046ee230632fb957dd4ece4047a3f13..01332d55f1d1f32102a24f67af3e9b959e0e8f10 100644
--- a/stitch_project/stitch/_xmsgs/pn_parser.xmsgs
+++ b/stitch_project/stitch/_xmsgs/pn_parser.xmsgs
@@ -8,7 +8,7 @@
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<messages>
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/LockinChain.vhd" into library work</arg>
+<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/LockinChainTestbench.vhd" into library work</arg>
</msg>
</messages>
diff --git a/stitch_project/stitch/iseconfig/Stitch.xreport b/stitch_project/stitch/iseconfig/Stitch.xreport
index 45c43f33110e6cbe7d94e6beae02266fd25dcc5f..35012a838cd294755a9daa3fb94a178b55d321ac 100644
--- a/stitch_project/stitch/iseconfig/Stitch.xreport
+++ b/stitch_project/stitch/iseconfig/Stitch.xreport
@@ -1,7 +1,7 @@
<?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" >
<header>
- <DateModified>2024-12-02T23:58:37</DateModified>
+ <DateModified>2024-12-03T07:12:28</DateModified>
<ModuleName>Stitch</ModuleName>
<SummaryTimeStamp>2024-11-20T16:17:55</SummaryTimeStamp>
<SavedFilePath>/home/ise/iseprojects/stitch/stitch_project/stitch/iseconfig/Stitch.xreport</SavedFilePath>
diff --git a/stitch_project/stitch/isim.log b/stitch_project/stitch/isim.log
index 4c4c8b42845c8b03c1b034a8db23e7a56d348937..81a49093fdf40517b0153aad5f17be4bb4bbf2a1 100644
--- a/stitch_project/stitch/isim.log
+++ b/stitch_project/stitch/isim.log
@@ -14,11 +14,9 @@ Time resolution is 1 ps
Simulator is doing circuit initialization process.
Finished circuit initialization process.
# restart
-# run 2ms
+# vcd dumpfile data.vcd
+# vcd dumpvars -m /UUT
+# run 20 ms
Simulator is doing circuit initialization process.
Finished circuit initialization process.
-# restart
-# run 50ms
-Simulator is doing circuit initialization process.
-Finished circuit initialization process.
-# exit 0
+# vcd dumpflush
diff --git a/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
index 49ec59b967b9894809d013ef121db22dda7202b9..ee28da9559f83829ab4afcbe5d4b07b85abc966e 100644
Binary files a/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg and b/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ
diff --git a/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/isimkernel.log b/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/isimkernel.log
index 0258e9b22358e5dde13e9f0e21d79d4c87066bf7..6081e72aaf6c5c935b87cd83c303972e08911474 100644
--- a/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/isimkernel.log
+++ b/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/isimkernel.log
@@ -2,27 +2,9 @@ Command line:
LockinChainTestbench_isim_beh.exe
-simmode gui
-simrunnum 0
- -socket 43004
+ -socket 48728
-Tue Dec 3 00:16:55 2024
+Tue Dec 3 07:13:02 2024
Elaboration Time: 0.04 sec
-
- Current Memory Usage: 205.578 Meg
-
- Total Signals : 408
- Total Nets : 6050
- Total Signal Drivers : 327
- Total Blocks : 130
- Total Primitive Blocks : 86
- Total Processes : 256
- Total Traceable Variables : 391
- Total Scalar Nets and Variables : 52352
-
- Total Simulation Time: 288.42 sec
-
- Current Memory Usage: 283.177 Meg
-
-Tue Dec 3 00:35:52 2024
-
diff --git a/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/netId.dat b/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/netId.dat
index d9ff933dfb86aad1a76521cb7e378fc1750579b3..d881129c559c70355e6a417fc073a9583afe1bd0 100644
Binary files a/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/netId.dat and b/stitch_project/stitch/isim/LockinChainTestbench_isim_beh.exe.sim/netId.dat differ
diff --git a/stitch_project/stitch/stitch.gise b/stitch_project/stitch/stitch.gise
index d3b1c0a3ccb1aa62b79b6b3febae274dc7688f66..0fe23fbad8f2e6a7a95afc7cedede06a78a57c78 100644
--- a/stitch_project/stitch/stitch.gise
+++ b/stitch_project/stitch/stitch.gise
@@ -233,11 +233,9 @@
<outfile xil_pn:name="isim.log"/>
<outfile xil_pn:name="xilinxsim.ini"/>
</transform>
- <transform xil_pn:end_ts="1733185014" xil_pn:in_ck="5936751511503204400" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="-5768344839647098945" xil_pn:start_ts="1733185014">
+ <transform xil_pn:end_ts="1733209981" xil_pn:in_ck="5936751511503204400" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="-5768344839647098945" xil_pn:start_ts="1733209980">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
- <status xil_pn:value="OutOfDateForOutputs"/>
- <status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="LockinChainTestbench_isim_beh.wdb"/>
<outfile xil_pn:name="isim.cmd"/>
<outfile xil_pn:name="isim.log"/>
@@ -323,7 +321,7 @@
<transform xil_pn:end_ts="1733154795" xil_pn:in_ck="-4325218870543059951" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-398923363910175968" xil_pn:start_ts="1733154772">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
- <status xil_pn:value="NotReadyToRun"/>
+ <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="OutOfDateForOutputs"/>
@@ -333,7 +331,7 @@
</transform>
<transform xil_pn:end_ts="1733154820" xil_pn:in_ck="-6627939747938971286" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-3829590541433901613" xil_pn:start_ts="1733154795">
<status xil_pn:value="SuccessfullyRun"/>
- <status xil_pn:value="NotReadyToRun"/>
+ <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="OutOfDateForOutputs"/>
@@ -343,7 +341,7 @@
<transform xil_pn:end_ts="1733154828" xil_pn:in_ck="4019925351390994" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="4970201210546912173" xil_pn:start_ts="1733154820">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
- <status xil_pn:value="NotReadyToRun"/>
+ <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="OutOfDateForOutputs"/>
@@ -352,7 +350,7 @@
</transform>
<transform xil_pn:end_ts="1733154820" xil_pn:in_ck="-4527387296597967219" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1733154814">
<status xil_pn:value="SuccessfullyRun"/>
- <status xil_pn:value="NotReadyToRun"/>
+ <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="OutOfDateForOutputs"/>
diff --git a/utility/TestbenchAutogeneration.ipynb b/utility/TestbenchAutogeneration.ipynb
index eebb4dc4799b6ebfc4649053239c94105ee63880..88da6ed1a8d9b6f1d44b3e37a68d515fe8cadac9 100644
--- a/utility/TestbenchAutogeneration.ipynb
+++ b/utility/TestbenchAutogeneration.ipynb
@@ -2,7 +2,7 @@
"cells": [
{
"cell_type": "code",
- "execution_count": 4,
+ "execution_count": 3,
"metadata": {},
"outputs": [],
"source": [
@@ -43,11 +43,11 @@
},
{
"cell_type": "code",
- "execution_count": 55,
+ "execution_count": 25,
"metadata": {},
"outputs": [],
"source": [
- "frequencies = [50000, 95000, 150000]\n",
+ "frequencies = [73260.07326007326, 109890.10989010989, 156985.87127158555]\n",
"\n",
"str = \"--mem_dphi\\n\"\n",
"condStr = \"if\"\n",
@@ -71,7 +71,7 @@
},
{
"cell_type": "code",
- "execution_count": null,
+ "execution_count": 26,
"metadata": {},
"outputs": [],
"source": [
@@ -90,7 +90,7 @@
},
{
"cell_type": "code",
- "execution_count": null,
+ "execution_count": 27,
"metadata": {},
"outputs": [],
"source": [
@@ -118,7 +118,7 @@
},
{
"cell_type": "code",
- "execution_count": 58,
+ "execution_count": 28,
"metadata": {},
"outputs": [],
"source": [
@@ -150,7 +150,7 @@
},
{
"cell_type": "code",
- "execution_count": null,
+ "execution_count": 29,
"metadata": {},
"outputs": [],
"source": [
@@ -171,7 +171,7 @@
},
{
"cell_type": "code",
- "execution_count": 61,
+ "execution_count": 30,
"metadata": {},
"outputs": [
{
@@ -180,37 +180,37 @@
"text": [
"--mem_dphi\n",
"if SWEEPER_dphi_mem_rd_addr = \"0000000000\" then\n",
- " SWEEPER_dphi_mem_rd_data <= \"00001000001100010010011\";\n",
+ " SWEEPER_dphi_mem_rd_data <= \"00001100000000001100000\";\n",
"elsif SWEEPER_dphi_mem_rd_addr = \"0000000001\" then\n",
- " SWEEPER_dphi_mem_rd_data <= \"00001111100100001001011\";\n",
+ " SWEEPER_dphi_mem_rd_data <= \"00010010000000010010000\";\n",
"else\n",
- " SWEEPER_dphi_mem_rd_data <= \"00011000100100110111010\";\n",
+ " SWEEPER_dphi_mem_rd_data <= \"00011001101110000111011\";\n",
"end if;\n",
"--mem_ddphi\n",
- "SWEEPER_ddphi_mem_rd_data <= \"00011011011111001101111\";\n",
+ "SWEEPER_ddphi_mem_rd_data <= \"01111111111111111111111\";\n",
"--mem_n_ringup\n",
"if SWEEPER_n_ringup_mem_rd_addr = \"0000000000\" then\n",
- " SWEEPER_n_ringup_mem_rd_data <= \"00000000000011110100001001000000\";\n",
+ " SWEEPER_n_ringup_mem_rd_data <= \"00000000000001000010101001101000\";\n",
"elsif SWEEPER_n_ringup_mem_rd_addr = \"0000000001\" then\n",
- " SWEEPER_n_ringup_mem_rd_data <= \"00000000000010000000011111101011\";\n",
+ " SWEEPER_n_ringup_mem_rd_data <= \"00000000000000101100011011110000\";\n",
"else\n",
- " SWEEPER_n_ringup_mem_rd_data <= \"00000000000001010001011000010101\";\n",
+ " SWEEPER_n_ringup_mem_rd_data <= \"00000000000000011111000110101000\";\n",
"end if;\n",
"--mem_n_sweep\n",
"if SWEEPER_n_sweep_mem_rd_addr = \"0000000000\" then\n",
" SWEEPER_n_sweep_mem_rd_data <= \"00000000000000000000000000000000\";\n",
"elsif SWEEPER_n_sweep_mem_rd_addr = \"0000000001\" then\n",
- " SWEEPER_n_sweep_mem_rd_data <= \"00000000001000100101010100001001\";\n",
+ " SWEEPER_n_sweep_mem_rd_data <= \"00000000000001100000000001100000\";\n",
"else\n",
- " SWEEPER_n_sweep_mem_rd_data <= \"00000000001010011111011000110010\";\n",
+ " SWEEPER_n_sweep_mem_rd_data <= \"00000000000001111011011101010110\";\n",
"end if;\n",
"--mem_n_meas\n",
"if SWEEPER_n_ringup_mem_rd_addr = \"0000000000\" then\n",
- " SWEEPER_n_meas_mem_rd_data <= \"00000000000011110100001001000000\";\n",
+ " SWEEPER_n_meas_mem_rd_data <= \"00000000000001000010101001101000\";\n",
"elsif SWEEPER_n_ringup_mem_rd_addr = \"0000000001\" then\n",
- " SWEEPER_n_meas_mem_rd_data <= \"00000000000010000000011111101011\";\n",
+ " SWEEPER_n_meas_mem_rd_data <= \"00000000000000101100011011110000\";\n",
"else\n",
- " SWEEPER_n_meas_mem_rd_data <= \"00000000000001010001011000010101\";\n",
+ " SWEEPER_n_meas_mem_rd_data <= \"00000000000000011111000110101000\";\n",
"end if;\n",
"\n"
]
@@ -220,6 +220,95 @@
"print(str)"
]
},
+ {
+ "cell_type": "code",
+ "execution_count": null,
+ "metadata": {},
+ "outputs": [],
+ "source": []
+ },
+ {
+ "cell_type": "code",
+ "execution_count": 31,
+ "metadata": {},
+ "outputs": [
+ {
+ "name": "stdout",
+ "output_type": "stream",
+ "text": [
+ "9100\n"
+ ]
+ }
+ ],
+ "source": [
+ "responseAmp = 1e6\n",
+ "responseFreq = frequencies[1]\n",
+ "\n",
+ "periodns = int(1./frequencies[1]*1e9)\n",
+ "periodids = 910\n",
+ "print(periodns)\n"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": 32,
+ "metadata": {},
+ "outputs": [
+ {
+ "data": {
+ "text/plain": [
+ "11.567032967032967"
+ ]
+ },
+ "execution_count": 32,
+ "metadata": {},
+ "output_type": "execute_result"
+ }
+ ],
+ "source": [
+ "10526/910"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": 33,
+ "metadata": {},
+ "outputs": [
+ {
+ "data": {
+ "text/plain": [
+ "156985.87127158555"
+ ]
+ },
+ "execution_count": 33,
+ "metadata": {},
+ "output_type": "execute_result"
+ }
+ ],
+ "source": [
+ "1/(910*1e-9)/7."
+ ]
+ },
+ {
+ "cell_type": "code",
+ "execution_count": 34,
+ "metadata": {},
+ "outputs": [
+ {
+ "data": {
+ "text/plain": [
+ "11.567032967032967"
+ ]
+ },
+ "execution_count": 34,
+ "metadata": {},
+ "output_type": "execute_result"
+ }
+ ],
+ "source": [
+ "10526/910"
+ ]
+ },
{
"cell_type": "code",
"execution_count": null,