diff --git a/stitch_project/stitch/Stitch.bin b/stitch_project/stitch/Stitch.bin
index 246a2cce6de3ceca0dc01612280915f9aa51e20c..7a9fd93ddc55375e4793cb4d15b97e52fd8919a4 100644
Binary files a/stitch_project/stitch/Stitch.bin and b/stitch_project/stitch/Stitch.bin differ
diff --git a/stitch_project/stitch/ipcore_dir/Mem32b1024.gise b/stitch_project/stitch/ipcore_dir/Mem32b1024.gise
index bcfda368923eebeddef905a37ca9465221e78381..0e500c0d210593934b43d4c94449454555784d98 100644
--- a/stitch_project/stitch/ipcore_dir/Mem32b1024.gise
+++ b/stitch_project/stitch/ipcore_dir/Mem32b1024.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="3185129189393661258" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="3185129189393661258" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7316991560476725013" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7316991560476725013" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-4997764571106617334" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-4997764571106617334" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/MemNsamp.gise b/stitch_project/stitch/ipcore_dir/MemNsamp.gise
index c04d58885555a3e589ff8b1b1aa5290385791bda..bbaf84c9564d7077e6d9ebcf8482dbdb98b36283 100644
--- a/stitch_project/stitch/ipcore_dir/MemNsamp.gise
+++ b/stitch_project/stitch/ipcore_dir/MemNsamp.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6820686459059339956" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6820686459059339956" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-7915863299109585449" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-7915863299109585449" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="5925673752377620492" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="5925673752377620492" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/MemSinCos.gise b/stitch_project/stitch/ipcore_dir/MemSinCos.gise
index aa71807ec842e1de8ef4343b151d0030798a404c..dc8d7f0b1c8a34eae094118f39e250a60de1e4a2 100644
--- a/stitch_project/stitch/ipcore_dir/MemSinCos.gise
+++ b/stitch_project/stitch/ipcore_dir/MemSinCos.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-2788987222142637780" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-2788987222142637780" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="4978056458918207415" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="4978056458918207415" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="6045739603124474860" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="6045739603124474860" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/_xmsgs/cg.xmsgs b/stitch_project/stitch/ipcore_dir/_xmsgs/cg.xmsgs
index 3ba78be9cabac17eaf8ad2002f9629139a0e710c..a9041a7ff61d88a82dff7c77450ed472c9619d10 100644
--- a/stitch_project/stitch/ipcore_dir/_xmsgs/cg.xmsgs
+++ b/stitch_project/stitch/ipcore_dir/_xmsgs/cg.xmsgs
@@ -8,20 +8,5 @@
<msg type="info" file="sim" num="172" delta="old" >Generating IP...
</msg>
-<msg type="warning" file="sim" num="0" delta="new" ><arg fmt="%s" index="1">A core named 'multiaddCos' already exists in the project. Output products for this core may be overwritten.</arg>
-</msg>
-
-<msg type="warning" file="sim" num="0" delta="new" ><arg fmt="%s" index="1">A core named 'multiaddCos' already exists in the project. Output products for this core may be overwritten.</arg>
-</msg>
-
-<msg type="info" file="sim" num="0" delta="new" ><arg fmt="%s" index="1">Pre-processing HDL files for 'multiaddCos'...</arg>
-</msg>
-
-<msg type="info" file="sim" num="949" delta="old" >Finished generation of ASY schematic symbol.
-</msg>
-
-<msg type="info" file="sim" num="948" delta="old" >Finished FLIST file generation.
-</msg>
-
</messages>
diff --git a/stitch_project/stitch/ipcore_dir/cordic.gise b/stitch_project/stitch/ipcore_dir/cordic.gise
index b4f2197ed58c108c39d791fdf35f2b944a0a6dfb..09b5590dd6a6bab2e7a5a02a71e51cb2657c3b3e 100644
--- a/stitch_project/stitch/ipcore_dir/cordic.gise
+++ b/stitch_project/stitch/ipcore_dir/cordic.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8782926585333300168" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8782926585333300168" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7818039811878659395" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7818039811878659395" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="3776669437272252152" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="3776669437272252152" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/coregen.log b/stitch_project/stitch/ipcore_dir/coregen.log
index d6cdda59325d0c1c6f966838f0b3317a3c7fcad8..84facf168f28a1497bb03851fb6169469f4f988e 100644
--- a/stitch_project/stitch/ipcore_dir/coregen.log
+++ b/stitch_project/stitch/ipcore_dir/coregen.log
@@ -1,69 +1,5 @@
INFO:sim:172 - Generating IP...
Applying current project options...
Finished applying current project options.
-WARNING:sim - A core named 'multiaddCos' already exists in the project. Output
- products for this core may be overwritten.
-Resolving generics for 'multiaddCos'...
-WARNING:sim - A core named 'multiaddCos' already exists in the project. Output
- products for this core may be overwritten.
-Applying external generics to 'multiaddCos'...
-Delivering associated files for 'multiaddCos'...
-Generating implementation netlist for 'multiaddCos'...
-INFO:sim - Pre-processing HDL files for 'multiaddCos'...
-Running synthesis for 'multiaddCos'
-Running ngcbuild...
-Writing VHO instantiation template for 'multiaddCos'...
-Writing VHDL behavioral simulation model for 'multiaddCos'...
-Delivered 3 files into directory
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddCo
-s
-Generating ASY schematic symbol...
-INFO:sim:949 - Finished generation of ASY schematic symbol.
-Generating SYM schematic symbol for 'multiaddCos'...
-Generating metadata file...
-Generating ISE project...
-XCO file found: multiaddCos.xco
-XMDF file found: multiaddCos_xmdf.tcl
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/core_resou
-rces.txt -view all -origin_type imported
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/gui_latenc
-y.txt -view all -origin_type imported
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddCo
-s.asy -view all -origin_type imported
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddCo
-s.ngc -view all -origin_type created
-Checking file
-"/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddC
-os.ngc" for project device match ...
-File
-"/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddC
-os.ngc" device information matches project device.
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddCo
-s.sym -view all -origin_type imported
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddCo
-s.vhd -view all -origin_type created
-INFO:HDLCompiler:1061 - Parsing VHDL file
- "/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multia
- ddCos.vhd" into library work
-INFO:ProjectMgmt - Parsing design hierarchy completed successfully.
-Adding
-/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/tmp/_cg/multiaddCo
-s.vho -view all -origin_type imported
-INFO:TclTasksC:2116 - The automatic calculation of top has been turned-off.
- Please set the new top explicitly by running the "project set top" command.
- To re-calculate the new top automatically, set the "Auto Implementation Top"
- property to true.
-Top level has been set to "/multiaddCos"
-Generating README file...
-Generating FLIST file...
-INFO:sim:948 - Finished FLIST file generation.
-Launching README viewer...
-Moving files to output directory...
-Finished moving files to output directory
-Wrote CGP file for project 'multiaddCos'.
+Cancelled executing Tcl generator.
+Wrote CGP file for project 'cordic'.
diff --git a/stitch_project/stitch/ipcore_dir/multiaddCos.gise b/stitch_project/stitch/ipcore_dir/multiaddCos.gise
index a5e2ed2d10caae52fa0bf68d157a90674bcec521..dc13fb37f6e8a6761c533a3f1c85b1ec4f0e799d 100644
--- a/stitch_project/stitch/ipcore_dir/multiaddCos.gise
+++ b/stitch_project/stitch/ipcore_dir/multiaddCos.gise
@@ -34,19 +34,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6854975743064405440" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6854975743064405440" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="8175489371127869360" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="8175489371127869360" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="4442281788066732546" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="4442281788066732546" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/multiaddSin.gise b/stitch_project/stitch/ipcore_dir/multiaddSin.gise
index aa7fe135500bc26630c11df139ed2e529725f55a..7a3886c276f2aed5a28dcd37de506d36177f0ec1 100644
--- a/stitch_project/stitch/ipcore_dir/multiaddSin.gise
+++ b/stitch_project/stitch/ipcore_dir/multiaddSin.gise
@@ -34,19 +34,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-4086567091452493108" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="1669001868035964362" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-442521152817317545" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-3351964163447721734" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-5480484674542449268" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-5480484674542449268" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/iseconfig/stitch.projectmgr b/stitch_project/stitch/iseconfig/stitch.projectmgr
index a3572e016eb52e42c42759707442691ffb6954fd..118a5812e91271aecbb451307cfa59ff100ae1a9 100644
--- a/stitch_project/stitch/iseconfig/stitch.projectmgr
+++ b/stitch_project/stitch/iseconfig/stitch.projectmgr
@@ -9,13 +9,13 @@
<ClosedNodesVersion>2</ClosedNodesVersion>
</ClosedNodes>
<SelectedItems>
- <SelectedItem>cordic (/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/cordic.xco)</SelectedItem>
+ <SelectedItem>Stitch - Behavioral (/home/ise/iseprojects/stitch/stitch_project/stitch/Stitch.vhd)</SelectedItem>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001b8000000020000000000000000000000000200000064ffffffff000000810000000300000002000001b80000000100000003000000000000000100000003</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000259000000020000000000000000000000000200000064ffffffff000000810000000300000002000002590000000100000003000000000000000100000003</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
- <CurrentItem>cordic (/home/ise/iseprojects/stitch/stitch_project/stitch/ipcore_dir/cordic.xco)</CurrentItem>
+ <CurrentItem>Stitch - Behavioral (/home/ise/iseprojects/stitch/stitch_project/stitch/Stitch.vhd)</CurrentItem>
</ItemView>
<ItemView engineview="SynthesisOnly" sourcetype="" guiview="Process" >
<ClosedNodes>
@@ -23,24 +23,26 @@
<ClosedNode>Design Utilities</ClosedNode>
</ClosedNodes>
<SelectedItems>
- <SelectedItem></SelectedItem>
+ <SelectedItem>Design Utilities</SelectedItem>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f4000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f40000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000268000000010000000100000000000000000000000064ffffffff000000810000000000000001000002680000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
- <CurrentItem></CurrentItem>
+ <CurrentItem>Design Utilities</CurrentItem>
</ItemView>
<ItemView guiview="File" >
<ClosedNodes>
<ClosedNodesVersion>1</ClosedNodesVersion>
</ClosedNodes>
- <SelectedItems/>
+ <SelectedItems>
+ <SelectedItem>LaserReceiver.vhd</SelectedItem>
+ </SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000318000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009400000001000000000000005d0000000100000000000000840000000100000000000001a30000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000268000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009400000001000000000000005d0000000100000000000000840000000100000000000000f30000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
- <CurrentItem>CommandDecoder.vhd</CurrentItem>
+ <CurrentItem>LaserReceiver.vhd</CurrentItem>
</ItemView>
<ItemView guiview="Library" >
<ClosedNodes>
@@ -50,7 +52,7 @@
<SelectedItems/>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000128000000010001000100000000000000000000000064ffffffff000000810000000000000001000001280000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000268000000010001000100000000000000000000000064ffffffff000000810000000000000001000002680000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem>work</CurrentItem>
</ItemView>
@@ -61,18 +63,21 @@
<ClosedNodesVersion>1</ClosedNodesVersion>
<ClosedNode>Configure Target Device</ClosedNode>
<ClosedNode>Design Utilities</ClosedNode>
- <ClosedNode>Implement Design</ClosedNode>
- <ClosedNode>Synthesize - XST</ClosedNode>
+ <ClosedNode>Implement Design/Map/Generate Post-Map Static Timing</ClosedNode>
+ <ClosedNode>Implement Design/Place & Route/Back-annotate Pin Locations</ClosedNode>
+ <ClosedNode>Implement Design/Place & Route/Generate IBIS Model</ClosedNode>
+ <ClosedNode>Implement Design/Place & Route/Generate Post-Place & Route Static Timing</ClosedNode>
+ <ClosedNode>Implement Design/Translate</ClosedNode>
<ClosedNode>User Constraints</ClosedNode>
</ClosedNodes>
<SelectedItems>
- <SelectedItem>Design Utilities</SelectedItem>
+ <SelectedItem></SelectedItem>
</SelectedItems>
- <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
+ <ScrollbarPosition orientation="vertical" >12</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f4000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f40000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000259000000010000000100000000000000000000000064ffffffff000000810000000000000001000002590000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
- <CurrentItem>Design Utilities</CurrentItem>
+ <CurrentItem></CurrentItem>
</ItemView>
<ItemView engineview="SynthesisOnly" sourcetype="DESUT_XCO" guiview="Process" >
<ClosedNodes>
@@ -84,7 +89,7 @@
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f4000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f40000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000268000000010000000100000000000000000000000064ffffffff000000810000000000000001000002680000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem></CurrentItem>
</ItemView>
diff --git a/stitch_project/stitch/stitch.gise b/stitch_project/stitch/stitch.gise
index e215cbf59d63bb675d37d98a21706b39af409a61..614d11a55d5df4039e5c6593b41a1357cc0a8a51 100644
--- a/stitch_project/stitch/stitch.gise
+++ b/stitch_project/stitch/stitch.gise
@@ -137,15 +137,15 @@
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
- <transform xil_pn:end_ts="1719629716" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1719629716">
+ <transform xil_pn:end_ts="1719652323" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1719652323">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629716" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-1000327047199651568" xil_pn:start_ts="1719629716">
+ <transform xil_pn:end_ts="1719652323" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-1000327047199651568" xil_pn:start_ts="1719652323">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:in_ck="-759697606739902482" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-2646617551451894976" xil_pn:start_ts="1719629716">
+ <transform xil_pn:end_ts="1719652324" xil_pn:in_ck="-759697606739902482" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-2646617551451894976" xil_pn:start_ts="1719652323">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="ipcore_dir/Mem32b1024.ngc"/>
@@ -161,23 +161,23 @@
<outfile xil_pn:name="ipcore_dir/multiaddSin.ngc"/>
<outfile xil_pn:name="ipcore_dir/multiaddSin.vhd"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-7265130963783582190" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-7265130963783582190" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="8977612015756273942" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="8977612015756273942" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719629717" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-3892313077777873078" xil_pn:start_ts="1719629717">
+ <transform xil_pn:end_ts="1719652324" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-3892313077777873078" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719650493" xil_pn:in_ck="5188678245468887340" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-6684372598054868263" xil_pn:start_ts="1719650483">
+ <transform xil_pn:end_ts="1719652332" xil_pn:in_ck="5188678245468887340" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-6684372598054868263" xil_pn:start_ts="1719652324">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -195,11 +195,11 @@
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
- <transform xil_pn:end_ts="1719629727" xil_pn:in_ck="5505092852261115" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-3812858228316398073" xil_pn:start_ts="1719629727">
+ <transform xil_pn:end_ts="1719652332" xil_pn:in_ck="5505092852261115" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-3812858228316398073" xil_pn:start_ts="1719652332">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719650496" xil_pn:in_ck="-9033868516707283598" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="230146358404850379" xil_pn:start_ts="1719650493">
+ <transform xil_pn:end_ts="1719652335" xil_pn:in_ck="-9033868516707283598" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="230146358404850379" xil_pn:start_ts="1719652332">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="Stitch.bld"/>
@@ -208,7 +208,7 @@
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
- <transform xil_pn:end_ts="1719650514" xil_pn:in_ck="-4325218870543059951" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-398923363910175968" xil_pn:start_ts="1719650496">
+ <transform xil_pn:end_ts="1719652351" xil_pn:in_ck="-4325218870543059951" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-398923363910175968" xil_pn:start_ts="1719652335">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -222,7 +222,7 @@
<outfile xil_pn:name="Stitch_usage.xml"/>
<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
</transform>
- <transform xil_pn:end_ts="1719650531" xil_pn:in_ck="-6627939747938971286" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-3829590541433901613" xil_pn:start_ts="1719650514">
+ <transform xil_pn:end_ts="1719652368" xil_pn:in_ck="-6627939747938971286" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-3829590541433901613" xil_pn:start_ts="1719652351">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="Stitch.ncd"/>
@@ -236,7 +236,7 @@
<outfile xil_pn:name="Stitch_par.xrpt"/>
<outfile xil_pn:name="_xmsgs/par.xmsgs"/>
</transform>
- <transform xil_pn:end_ts="1719650538" xil_pn:in_ck="4019925351390994" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="4970201210546912173" xil_pn:start_ts="1719650531">
+ <transform xil_pn:end_ts="1719652375" xil_pn:in_ck="4019925351390994" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="4970201210546912173" xil_pn:start_ts="1719652368">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -249,7 +249,7 @@
<outfile xil_pn:name="webtalk.log"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
</transform>
- <transform xil_pn:end_ts="1719650531" xil_pn:in_ck="-4527387296597967219" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1719650527">
+ <transform xil_pn:end_ts="1719652368" xil_pn:in_ck="-4527387296597967219" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1719652364">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="Stitch.twr"/>
diff --git a/stitch_project/stitch/xst/work/work.vdbl b/stitch_project/stitch/xst/work/work.vdbl
index 5a47a1354acbca18d3ba1505c1f10521d60b119d..8366cd4ae743d051ba45e8af240a7e2e22316d43 100644
Binary files a/stitch_project/stitch/xst/work/work.vdbl and b/stitch_project/stitch/xst/work/work.vdbl differ
diff --git a/stitch_project/stitch/xst/work/work.vdbx b/stitch_project/stitch/xst/work/work.vdbx
index 1bc574d78fc906848af1516404aba23d16471958..dafda7823cde824b745102d7b1cbedcc7b1935d3 100644
Binary files a/stitch_project/stitch/xst/work/work.vdbx and b/stitch_project/stitch/xst/work/work.vdbx differ