diff --git a/stitch_project/stitch/_xmsgs/pn_parser.xmsgs b/stitch_project/stitch/_xmsgs/pn_parser.xmsgs
index 16de26385b98a5cbd151f34bd688ea6645e78d33..7844eae3937359d76a73d5fcbeb6d5f8fe1ac8d0 100644
--- a/stitch_project/stitch/_xmsgs/pn_parser.xmsgs
+++ b/stitch_project/stitch/_xmsgs/pn_parser.xmsgs
@@ -8,31 +8,7 @@
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<messages>
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/Beeper.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/CommandDecoder.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/LaserReceiver.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/LockInAccumulator.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/ReadbackControl.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/SerialReceiver.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/SerialTransmitter.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/Stitch.vhd" into library work</arg>
-</msg>
-
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/Sweeper.vhd" into library work</arg>
+<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "/home/ise/iseprojects/stitch/stitch_project/stitch/DistanceUnwrapper.vhd" into library work</arg>
</msg>
</messages>
diff --git a/stitch_project/stitch/ipcore_dir/Mem32b1024.gise b/stitch_project/stitch/ipcore_dir/Mem32b1024.gise
index 75eab9585225cccac533b9dee87aa77a05e031d7..bd8e3bf240aaca1cd48aef7a0e3834146ba4acb8 100644
--- a/stitch_project/stitch/ipcore_dir/Mem32b1024.gise
+++ b/stitch_project/stitch/ipcore_dir/Mem32b1024.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="3185129189393661258" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="3185129189393661258" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7316991560476725013" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7316991560476725013" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-4997764571106617334" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-4997764571106617334" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/MemNsamp.gise b/stitch_project/stitch/ipcore_dir/MemNsamp.gise
index 2bae611f6e38d469d52760f9f11f5934ae428d15..df6a9b665eb33ac9e906c53c9e41fe1c9a037463 100644
--- a/stitch_project/stitch/ipcore_dir/MemNsamp.gise
+++ b/stitch_project/stitch/ipcore_dir/MemNsamp.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6820686459059339956" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6820686459059339956" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-7915863299109585449" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-7915863299109585449" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="5925673752377620492" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="5925673752377620492" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/MemSinCos.gise b/stitch_project/stitch/ipcore_dir/MemSinCos.gise
index 3d0d8861a4dbe785de5d8d8b81ca82600a182c62..7c1b8e10a108c32c75fa3097a1e9d74532554d00 100644
--- a/stitch_project/stitch/ipcore_dir/MemSinCos.gise
+++ b/stitch_project/stitch/ipcore_dir/MemSinCos.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-2788987222142637780" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-2788987222142637780" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="4978056458918207415" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="4978056458918207415" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="6045739603124474860" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="6045739603124474860" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/cordic.gise b/stitch_project/stitch/ipcore_dir/cordic.gise
index 21a8d1d8bb1ebdb9ed1b5d7fe0c6c287046ccc60..4cd62bd7f043d8c213b5e79159a3ef91061b8c25 100644
--- a/stitch_project/stitch/ipcore_dir/cordic.gise
+++ b/stitch_project/stitch/ipcore_dir/cordic.gise
@@ -32,19 +32,19 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8782926585333300168" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-8782926585333300168" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7818039811878659395" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="7818039811878659395" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="3776669437272252152" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="3776669437272252152" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
diff --git a/stitch_project/stitch/ipcore_dir/multiaddCos.gise b/stitch_project/stitch/ipcore_dir/multiaddCos.gise
index 3da4492681afb6c8c384797c7da51ec591915159..6d69dbdd9cbf80600297a0da678eddb0fc8a430d 100644
--- a/stitch_project/stitch/ipcore_dir/multiaddCos.gise
+++ b/stitch_project/stitch/ipcore_dir/multiaddCos.gise
@@ -26,9 +26,30 @@
<file xil_pn:fileType="FILE_USERDOC" xil_pn:name="gui_latency.txt" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_ASY" xil_pn:name="multiaddCos.asy" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="multiaddCos.sym" xil_pn:origination="imported"/>
- <file xil_pn:fileType="FILE_VHO" xil_pn:name="multiaddCos.vho" xil_pn:origination="imported"/>
+ <file xil_pn:fileType="FILE_VEO" xil_pn:name="multiaddCos.veo" xil_pn:origination="imported"/>
</files>
- <transforms xmlns="http://www.xilinx.com/XMLSchema"/>
+ <transforms xmlns="http://www.xilinx.com/XMLSchema">
+ <transform xil_pn:end_ts="1719622862" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1719622862">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6854975743064405440" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="8175489371127869360" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="4442281788066732546" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ </transforms>
</generated_project>
diff --git a/stitch_project/stitch/ipcore_dir/multiaddCos.xise b/stitch_project/stitch/ipcore_dir/multiaddCos.xise
index d4864b6c7565485d8005740d3cc2a40799fa3461..5539ccf0e588429d444098d9bb5fedca9fb810d4 100644
--- a/stitch_project/stitch/ipcore_dir/multiaddCos.xise
+++ b/stitch_project/stitch/ipcore_dir/multiaddCos.xise
@@ -17,11 +17,11 @@
<files>
<file xil_pn:name="multiaddCos.ngc" xil_pn:type="FILE_NGC">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="4"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="4"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="multiaddCos.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="6"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="6"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="6"/>
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="6"/>
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="6"/>
diff --git a/stitch_project/stitch/ipcore_dir/multiaddSin.gise b/stitch_project/stitch/ipcore_dir/multiaddSin.gise
index 607d7a7174aa7057d4ff45e4016f39a3ec18870d..6e3a992191e7b6edac8fd5baa98c5d36de899346 100644
--- a/stitch_project/stitch/ipcore_dir/multiaddSin.gise
+++ b/stitch_project/stitch/ipcore_dir/multiaddSin.gise
@@ -26,9 +26,30 @@
<file xil_pn:fileType="FILE_USERDOC" xil_pn:name="gui_latency.txt" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_ASY" xil_pn:name="multiaddSin.asy" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="multiaddSin.sym" xil_pn:origination="imported"/>
- <file xil_pn:fileType="FILE_VHO" xil_pn:name="multiaddSin.vho" xil_pn:origination="imported"/>
+ <file xil_pn:fileType="FILE_VEO" xil_pn:name="multiaddSin.veo" xil_pn:origination="imported"/>
</files>
- <transforms xmlns="http://www.xilinx.com/XMLSchema"/>
+ <transforms xmlns="http://www.xilinx.com/XMLSchema">
+ <transform xil_pn:end_ts="1719622862" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1719622862">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="1669001868035964362" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-3351964163447721734" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-5480484674542449268" xil_pn:start_ts="1719693566">
+ <status xil_pn:value="SuccessfullyRun"/>
+ <status xil_pn:value="ReadyToRun"/>
+ </transform>
+ </transforms>
</generated_project>
diff --git a/stitch_project/stitch/ipcore_dir/multiaddSin.xise b/stitch_project/stitch/ipcore_dir/multiaddSin.xise
index 13ab53bb90f203f6b0bb6a99cd21daee6d889021..2ed7e4714c6ac5b4adba6aa2dcd16b9bca481cff 100644
--- a/stitch_project/stitch/ipcore_dir/multiaddSin.xise
+++ b/stitch_project/stitch/ipcore_dir/multiaddSin.xise
@@ -17,11 +17,11 @@
<files>
<file xil_pn:name="multiaddSin.ngc" xil_pn:type="FILE_NGC">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="4"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="4"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="multiaddSin.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="6"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="6"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="6"/>
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="6"/>
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="6"/>
diff --git a/stitch_project/stitch/iseconfig/stitch.projectmgr b/stitch_project/stitch/iseconfig/stitch.projectmgr
index 118a5812e91271aecbb451307cfa59ff100ae1a9..75b4e17e5e62b3b94d949cbaad83b576620f2e1c 100644
--- a/stitch_project/stitch/iseconfig/stitch.projectmgr
+++ b/stitch_project/stitch/iseconfig/stitch.projectmgr
@@ -9,13 +9,13 @@
<ClosedNodesVersion>2</ClosedNodesVersion>
</ClosedNodes>
<SelectedItems>
- <SelectedItem>Stitch - Behavioral (/home/ise/iseprojects/stitch/stitch_project/stitch/Stitch.vhd)</SelectedItem>
+ <SelectedItem>iLockInAccumulator - LockInAccumulator - Behavioral (/home/ise/iseprojects/stitch/stitch_project/stitch/LockInAccumulator.vhd)</SelectedItem>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000259000000020000000000000000000000000200000064ffffffff000000810000000300000002000002590000000100000003000000000000000100000003</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
- <CurrentItem>Stitch - Behavioral (/home/ise/iseprojects/stitch/stitch_project/stitch/Stitch.vhd)</CurrentItem>
+ <CurrentItem>iLockInAccumulator - LockInAccumulator - Behavioral (/home/ise/iseprojects/stitch/stitch_project/stitch/LockInAccumulator.vhd)</CurrentItem>
</ItemView>
<ItemView engineview="SynthesisOnly" sourcetype="" guiview="Process" >
<ClosedNodes>
@@ -40,7 +40,7 @@
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000268000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009400000001000000000000005d0000000100000000000000840000000100000000000000f30000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000000000000000100000000000000000000000000000000000004df000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009400000001000000000000005d00000001000000000000008400000001000000000000036a0000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem>LaserReceiver.vhd</CurrentItem>
</ItemView>
@@ -52,7 +52,7 @@
<SelectedItems/>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000268000000010001000100000000000000000000000064ffffffff000000810000000000000001000002680000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000128000000010001000100000000000000000000000064ffffffff000000810000000000000001000001280000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem>work</CurrentItem>
</ItemView>
@@ -73,9 +73,9 @@
<SelectedItems>
<SelectedItem></SelectedItem>
</SelectedItems>
- <ScrollbarPosition orientation="vertical" >12</ScrollbarPosition>
+ <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
- <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000259000000010000000100000000000000000000000064ffffffff000000810000000000000001000002590000000100000000</ViewHeaderState>
+ <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000268000000010000000100000000000000000000000064ffffffff000000810000000000000001000002680000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem></CurrentItem>
</ItemView>
diff --git a/stitch_project/stitch/stitch.gise b/stitch_project/stitch/stitch.gise
index bfb483f14f932c0faf9703e7cc366d86090fba90..ed33937f97ac1f827219fa92c15d7587b39f243d 100644
--- a/stitch_project/stitch/stitch.gise
+++ b/stitch_project/stitch/stitch.gise
@@ -128,6 +128,8 @@
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
<file xil_pn:fileType="FILE_USERDOC" xil_pn:name="ipcore_dir/cordic_readme.txt"/>
<file xil_pn:fileType="FILE_LOG" xil_pn:name="ipcore_dir/coregen.log"/>
+ <file xil_pn:fileType="FILE_VHO" xil_pn:name="ipcore_dir/multiaddCos.vho" xil_pn:origination="imported"/>
+ <file xil_pn:fileType="FILE_VHO" xil_pn:name="ipcore_dir/multiaddSin.vho" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
@@ -135,15 +137,15 @@
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
- <transform xil_pn:end_ts="1719654152" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1719654152">
+ <transform xil_pn:end_ts="1719693565" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1719693565">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654152" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-1000327047199651568" xil_pn:start_ts="1719654152">
+ <transform xil_pn:end_ts="1719693565" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-1000327047199651568" xil_pn:start_ts="1719693565">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:in_ck="-759697606739902482" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-2646617551451894976" xil_pn:start_ts="1719654152">
+ <transform xil_pn:end_ts="1719693566" xil_pn:in_ck="-759697606739902482" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-2646617551451894976" xil_pn:start_ts="1719693565">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="ipcore_dir/Mem32b1024.ngc"/>
@@ -159,27 +161,26 @@
<outfile xil_pn:name="ipcore_dir/multiaddSin.ngc"/>
<outfile xil_pn:name="ipcore_dir/multiaddSin.vhd"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-7265130963783582190" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-7265130963783582190" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="8977612015756273942" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:in_ck="6231951733186561032" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="8977612015756273942" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654154" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-3892313077777873078" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693566" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-3892313077777873078" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654163" xil_pn:in_ck="5188678245468887340" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-6684372598054868263" xil_pn:start_ts="1719654154">
+ <transform xil_pn:end_ts="1719693578" xil_pn:in_ck="-2009185075857292629" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-6684372598054868263" xil_pn:start_ts="1719693566">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
- <status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="Stitch.lso"/>
@@ -194,56 +195,66 @@
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
- <transform xil_pn:end_ts="1719654163" xil_pn:in_ck="5505092852261115" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-3812858228316398073" xil_pn:start_ts="1719654163">
+ <transform xil_pn:end_ts="1719693578" xil_pn:in_ck="5505092852261115" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-3812858228316398073" xil_pn:start_ts="1719693578">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
- <transform xil_pn:end_ts="1719654167" xil_pn:in_ck="-9033868516707283598" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="230146358404850379" xil_pn:start_ts="1719654163">
+ <transform xil_pn:end_ts="1719693582" xil_pn:in_ck="-9033868516707283598" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="230146358404850379" xil_pn:start_ts="1719693578">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
- <status xil_pn:value="OutOfDateForInputs"/>
- <status xil_pn:value="OutOfDateForPredecessor"/>
- <status xil_pn:value="OutOfDateForOutputs"/>
- <status xil_pn:value="InputRemoved"/>
- <status xil_pn:value="OutputRemoved"/>
+ <outfile xil_pn:name="Stitch.bld"/>
+ <outfile xil_pn:name="Stitch.ngd"/>
+ <outfile xil_pn:name="Stitch_ngdbuild.xrpt"/>
+ <outfile xil_pn:name="_ngo"/>
+ <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
- <transform xil_pn:end_ts="1719654184" xil_pn:in_ck="-4325218870543059951" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-398923363910175968" xil_pn:start_ts="1719654167">
+ <transform xil_pn:end_ts="1719693599" xil_pn:in_ck="-4325218870543059951" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="-398923363910175968" xil_pn:start_ts="1719693582">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
- <status xil_pn:value="NotReadyToRun"/>
- <status xil_pn:value="OutOfDateForInputs"/>
- <status xil_pn:value="OutOfDateForPredecessor"/>
- <status xil_pn:value="OutOfDateForOutputs"/>
- <status xil_pn:value="InputRemoved"/>
- <status xil_pn:value="OutputRemoved"/>
+ <status xil_pn:value="ReadyToRun"/>
+ <outfile xil_pn:name="Stitch.pcf"/>
+ <outfile xil_pn:name="Stitch_map.map"/>
+ <outfile xil_pn:name="Stitch_map.mrp"/>
+ <outfile xil_pn:name="Stitch_map.ncd"/>
+ <outfile xil_pn:name="Stitch_map.ngm"/>
+ <outfile xil_pn:name="Stitch_map.xrpt"/>
+ <outfile xil_pn:name="Stitch_summary.xml"/>
+ <outfile xil_pn:name="Stitch_usage.xml"/>
+ <outfile xil_pn:name="_xmsgs/map.xmsgs"/>
</transform>
- <transform xil_pn:end_ts="1719654204" xil_pn:in_ck="-6627939747938971286" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-3829590541433901613" xil_pn:start_ts="1719654184">
+ <transform xil_pn:end_ts="1719693617" xil_pn:in_ck="-6627939747938971286" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-3829590541433901613" xil_pn:start_ts="1719693599">
<status xil_pn:value="SuccessfullyRun"/>
- <status xil_pn:value="NotReadyToRun"/>
- <status xil_pn:value="OutOfDateForInputs"/>
- <status xil_pn:value="OutOfDateForPredecessor"/>
- <status xil_pn:value="OutOfDateForOutputs"/>
- <status xil_pn:value="InputRemoved"/>
- <status xil_pn:value="OutputRemoved"/>
+ <status xil_pn:value="ReadyToRun"/>
+ <outfile xil_pn:name="Stitch.ncd"/>
+ <outfile xil_pn:name="Stitch.pad"/>
+ <outfile xil_pn:name="Stitch.par"/>
+ <outfile xil_pn:name="Stitch.ptwx"/>
+ <outfile xil_pn:name="Stitch.unroutes"/>
+ <outfile xil_pn:name="Stitch.xpi"/>
+ <outfile xil_pn:name="Stitch_pad.csv"/>
+ <outfile xil_pn:name="Stitch_pad.txt"/>
+ <outfile xil_pn:name="Stitch_par.xrpt"/>
+ <outfile xil_pn:name="_xmsgs/par.xmsgs"/>
</transform>
- <transform xil_pn:end_ts="1719654210" xil_pn:in_ck="4019925351390994" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="4970201210546912173" xil_pn:start_ts="1719654204">
+ <transform xil_pn:end_ts="1719693624" xil_pn:in_ck="4019925351390994" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="4970201210546912173" xil_pn:start_ts="1719693617">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
- <status xil_pn:value="NotReadyToRun"/>
- <status xil_pn:value="OutOfDateForInputs"/>
- <status xil_pn:value="OutOfDateForPredecessor"/>
- <status xil_pn:value="OutOfDateForOutputs"/>
- <status xil_pn:value="InputRemoved"/>
- <status xil_pn:value="OutputRemoved"/>
+ <status xil_pn:value="ReadyToRun"/>
+ <outfile xil_pn:name="Stitch.bgn"/>
+ <outfile xil_pn:name="Stitch.bin"/>
+ <outfile xil_pn:name="Stitch.bit"/>
+ <outfile xil_pn:name="Stitch.drc"/>
+ <outfile xil_pn:name="Stitch.ut"/>
+ <outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
+ <outfile xil_pn:name="webtalk.log"/>
+ <outfile xil_pn:name="webtalk_pn.xml"/>
</transform>
- <transform xil_pn:end_ts="1719654204" xil_pn:in_ck="-4527387296597967219" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1719654199">
+ <transform xil_pn:end_ts="1719693617" xil_pn:in_ck="-4527387296597967219" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1719693613">
<status xil_pn:value="SuccessfullyRun"/>
- <status xil_pn:value="NotReadyToRun"/>
- <status xil_pn:value="OutOfDateForInputs"/>
- <status xil_pn:value="OutOfDateForPredecessor"/>
- <status xil_pn:value="OutOfDateForOutputs"/>
- <status xil_pn:value="InputRemoved"/>
- <status xil_pn:value="OutputRemoved"/>
+ <status xil_pn:value="ReadyToRun"/>
+ <outfile xil_pn:name="Stitch.twr"/>
+ <outfile xil_pn:name="Stitch.twx"/>
+ <outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
</transform>
</transforms>
diff --git a/stitch_project/stitch/stitch.xise b/stitch_project/stitch/stitch.xise
index a710882b254b0a7a452f658998a8a652aa9b398d..e5cf87e5237fee78bd23e7be2645d4194e595ae2 100644
--- a/stitch_project/stitch/stitch.xise
+++ b/stitch_project/stitch/stitch.xise
@@ -25,7 +25,7 @@
</file>
<file xil_pn:name="CommandDecoder.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="72"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="13"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="14"/>
</file>
<file xil_pn:name="Sweeper.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="73"/>
@@ -65,7 +65,7 @@
</file>
<file xil_pn:name="Stitch.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="122"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="15"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="16"/>
</file>
<file xil_pn:name="SerialTransmitter.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="123"/>
@@ -76,7 +76,11 @@
</file>
<file xil_pn:name="Beeper.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="125"/>
- <association xil_pn:name="Implementation" xil_pn:seqID="14"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="15"/>
+ </file>
+ <file xil_pn:name="DistanceUnwrapper.vhd" xil_pn:type="FILE_VHDL">
+ <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="167"/>
+ <association xil_pn:name="Implementation" xil_pn:seqID="13"/>
</file>
<file xil_pn:name="ipcore_dir/multiaddSin.xise" xil_pn:type="FILE_COREGENISE">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
diff --git a/stitch_project/stitch/xst/work/work.vdbl b/stitch_project/stitch/xst/work/work.vdbl
index 3264e8c04b5ad7fd7e32900cebd652afdee13b83..2e8613a65ed6c328dd1e7f84e9fd21076725dbbc 100644
Binary files a/stitch_project/stitch/xst/work/work.vdbl and b/stitch_project/stitch/xst/work/work.vdbl differ
diff --git a/stitch_project/stitch/xst/work/work.vdbx b/stitch_project/stitch/xst/work/work.vdbx
index 7ea3353216b9b81154275e40a42922b59eae7fe2..58c04eb059c6131d23cde7fc8401065f93444cd7 100644
Binary files a/stitch_project/stitch/xst/work/work.vdbx and b/stitch_project/stitch/xst/work/work.vdbx differ